xiaohong-ai@v1.0 // booting kernel... OK

One Voice. All Devices.

Powered by the HiSilicon WS63 RISC-V SoC, running OpenHarmony lightweight kernel, wired into NearLink (SLE 1.0) — a desk-class AI companion that's open source from die to display.

OpenHarmony 6.0/6.1 RISC-V 32bit @240MHz NearLink SLE 1.0 Wi-Fi 6 · BLE 5.2
14
Demos
10+
Repos
240MHz
Max clock
2×
Open stacks
> HEY XIAOHONG
> I'm listening_
  • PWR
  • NET
  • SLE
UNIT // WS63-A1 STATUS: ONLINE
xiaohong:~ # build & flash
# 1. Pull the OpenHarmony tree
$ repo init -u https://atomgit.com/xiaohong-ai/manifest
$ repo sync -c

# 2. Build the RISC-V image
$ hb set xiaohong && hb build -f

# 3. Flash & wake
$ ./flash.sh /dev/ttyUSB0 
OPENHARMONY RISC-V NEARLINK SLE 1.0 HISILICON WS63 WI-FI 6 (802.11ax) BLE 5.2 / MESH CI1302 ASR 240×240 TFT 1.54" OPEN AT EVERY LAYER OPENHARMONY RISC-V NEARLINK SLE 1.0 HISILICON WS63 WI-FI 6 (802.11ax) BLE 5.2 / MESH CI1302 ASR 240×240 TFT 1.54" OPEN AT EVERY LAYER
01 / PRODUCT

An open-source AI unit for your desk

A 47×47×20 mm cube of hardcore: OpenHarmony plus RISC-V at the core, with NearLink, Wi-Fi 6, and BLE 5.2 stacked into a single die. "Speak once, the room responds."

Xiaohong AI product diagram
01

1.54" TFT · 240×240

High-contrast display drives wake-up animations, expressions, and live system state.

02

4× magnetic posts + USB-C

Snap-on dock with magnetic corners. Type-C 2.0 carries both data and power.

03

UART / I²C / GPIO breakout

Three reserved standard interfaces — solder one wire and own every IoT peripheral in the house.

04

Single mic + 1.2 W speaker

On-device wake (CI1302) plus online LLM dialog — a steady "edge + cloud" voice pipeline.

02 / ARCHITECTURE

Three chips, one stack — open all the way down

From SoC to radio, from voice DSP to operating system — every layer is readable, modifiable, and flashable.

SoC HiSilicon WS63

Main control · multi-mode IoT SoC on RISC-V

32-bit RISC-V core up to 240 MHz, 606 KB SRAM, 300 KB ROM, 4 MB on-chip Flash plus 16 MB external. Wi-Fi 6, BLE 5.2 and NearLink integrated on a single die — three radios, one chip.

  • 240 MHz max clock
  • 4 + 16 MB Flash
  • 3-in-1 radio
ASR CI1302

Voice · on-device ASR NPU

Chipintelli CI1302 voice-recognition NPU drives single-mic far-field wake without any network. Pairs with cloud LLMs to form a robust "edge + cloud" dialog pipeline.

  • Local wake
  • Low-power NPU
  • Dual-path dialog
OS OpenHarmony 6.x

OS · lightweight OpenHarmony kernel

OpenHarmony 6.0 / 6.1 mini system — distributed soft-bus, HUKS security, full driver stack. Everything from boot to BSP to peripherals is open: the source is the documentation.

  • Mini kernel
  • HUKS security
  • Full-stack OSS
SOFTWARE STACK // top to bottom
APPAI dialog · smart-home control · UI layer
FWKOpenHarmony framework · distributed soft-bus · HUKS
HALPeripheral HDI · LVGL graphics · Opus audio
RFWi-Fi 6 / BLE 5.2 / NearLink SLE 1.0
SoCHiSilicon WS63 · RISC-V 32-bit @240 MHz
03 / SPECS

Specs · data is the truth

Small cube, no compromise. Every spec below comes from the official PCB and SCH — all hardware files are in the public repo.

Main SoC
HiSilicon WS63
RISC-V 32-bit · 240 MHz · 606 KB SRAM · 300 KB ROM · 4 MB + 16 MB Flash
Voice chip
Chipintelli CI1302
ASR NPU · on-device wake · single-mic array
Operating system
OpenHarmony 6.0 / 6.1
Mini system · distributed soft-bus
Display
1.54" TFT
240 × 240 resolution
Wireless
Wi-Fi 6 · BLE 5.2 · NearLink
802.11ax 2.4 GHz · Bluetooth 5.2 + Mesh · SLE 1.0
Power
3.7 V / 750 mAh
Built-in Li-ion · Type-C 2.0 data + power
Size · Speaker
47×47×20 mm
8Ω 1.2 W speaker · single mic
Expansion I/O
UART · I²C · GPIO
1× each · supports peripheral expansion
05 / WORKFLOW

Four steps · blank board to wake word

Mac or Windows, your call. All source, images, and flashing tools live in AtomGit.

  1. 01

    Set up dev environment

    Ubuntu 22.04 recommended · 16 GB+ RAM · VSCode + Remote-SSH. Host OS can be Windows or macOS.

    $ sudo dpkg-reconfigure dash   # → bash
  2. 02

    Sync + build sources

    Use manifest to pull the full OpenHarmony tree plus the xiaohong vendor. Build RISC-V images with hb.

    $ repo init -u https://atomgit.com/xiaohong-ai/manifest
  3. 03

    Flash to device

    CH341 serial + UartAssist / BurnTool on Windows, or burn.sh on macOS — one command to the WS63.

    $ ./burn.sh -p /dev/ttyUSB0 -f out.bin
  4. 04

    Run a demo · say hello

    Pick a sample under vendor/atomgit/xiaohong/.../samples/, add to BUILD.gn, reflash. Open serial at 115200.

    > HEY XIAOHONG ... [WAKEUP OK]
07 / PARTNERS

On giants' shoulders, with partners forward

Xiaohong AI is co-built by AtomGit with 60+ silicon partners and 10+ top universities. From silicon to OS, from radio stack to classroom — every layer ships with first-party open-source contributors.

CHIPS & ECOSYSTEM Silicon & ecosystem partners

HiSiliconMain SoC · WS63
ChipintelliVoice chip · CI1302
RockchipEdge AI · RK3588
NearLink AllianceSLE 1.0 wireless
OpenHarmonyOpen-source OS base
OpenAtom FoundationIncubation host
RISC-V InternationalOpen ISA standard
AtomGit / GitCodeCode hosting platform

UNIVERSITIES First batch of AtomGit Open Source Institutes

01Northeastern University#1 university OpenHarmony 6.0 contributor
02Xi'an Jiaotong UniversitySystems software / RISC-V research
03Shenzhen Technology UniversitySmart-device ecosystem dev
04SZ Info Vocational Tech U.HarmonyOS talent cultivation
05Shenzhen Polytechnic U.HarmonyOS elite class & micro-major
06Shanghai Sanda UniversityOpen-source education program
07Xi'an Business CollegeEmbedded & IoT training
08Guangzhou College of CommerceOpen-source software engineering
09Lanzhou Inst. of Info. Sci. & Tech.Smart-hardware innovation lab
10Harbin Huade UniversityOS & on-device AI
11Dezhou Sci-Tech Vocational CollegeVocational open-source practice

Building the AtomGit open-source ecosystem with 50+ universities and 60+ chip vendors. We'd love to have you.

// Get started

One board is enough to ship your first
line of OpenHarmony × NearLink code.